BrianHG_DDR3_DECA_test1_top.sv
Want to learn more about BrianHG_DDR3_DECA_test1_top.sv?
Get the Verilog Package Manager to access full documentation with detailed waveforms for BrianHG_DDR3_DECA_test1_top.sv.
Pinout diagram
For the full pinout diagram with detailed port information, please use the vpm docs
command.
Required dependencies
Run vpm include
to install and connect all subdependencies.
Don't have VPM? Get it now.